1. Field of the Invention
The present invention relates to an electrostatic discharge (“ESD”) protection device, an ESD protection arrangement and an ESD protection system, to protect a micro-electronic circuit or semiconductor circuit from electrostatic discharge. This invention also relates to a semiconductor circuit having the ESD protection device, the ESD protection arrangement or the ESD protection system.
2. Description of the Related Art
Controllable rectifiers, or thyristors, are used for protection from electrostatic discharges (the ESD case). An advantage of thyristors is that they support a high current density before damage to the thyristor occurs in an ESD case, the ESD case being present when an electrostatic discharge occurs. Also, thyristors hold a constant voltage even in conditions of a high current flow. Thyristors thus provide good protection for a circuit from the ESD case.
A prior art thyristor circuit 1 or ESD protection device is shown in FIG. 1a. A first terminal 27 of the thyristor circuit 1 is connected to the emitter of a PNP transistor 25, and via an n-well resistor 11 to the base of the PNP transistor 25 and the collector of an NPN transistor 26. The collector of the PNP transistor 25 is connected to the base of the NPN transistor 26 and via a p-well resistor 12 to a second terminal 28 of the thyristor circuit 1. The emitter of the NPN transistor 26 is also connected to the second terminal 28.
The method of functioning of the thyristor circuit 1 shown in FIG. 1a is explained using a current-voltage characteristic curve of FIG. 1b. If a voltage which is higher than a switching voltage 24 occurs between the terminals 27, 28 of the thyristor circuit 1, the thyristor circuit 1 passes into a low-resistance region, which begins at a point which is identified by a holding voltage 23 and a holding current 21, so that the current through the thyristor circuit 1 increases greatly. The thyristor circuit 1 is able to divert the energy of an electrostatic discharge so that this energy does not damage the circuit to be protected. After this energy is diverted, the voltage that is present at the thyristor circuit 1 should fall below the holding voltage 23, and the current which flows through the thyristor circuit 1 should fall below the holding current 21, so that the thyristor circuit 1 returns or falls back to a high-resistance region.
There may be two problems in prior art thyristor circuits. First, they often have a very high switching voltage 24, with the result that the circuit to be protected is damaged before the thyristor reaches the conducting state region (region in which the thyristor 1 has low resistance). Second, the holding voltage 23 of the thyristor 1 can be in a range that also includes the operating voltage of the circuit to be protected. The holding voltage then limits the conducting state region downward (see FIG. 1b). If the voltage that is present at the thyristor 1, which is operated in the conducting state region, does not fall below the holding voltage, the thyristor 1 remains in the conducting state region, which is undesirable because malfunctions or even destruction of a circuit to be protected may occur. The second problem is particularly disadvantageous circuits that are operated at 3 to 5 V or higher and are to be protected.
There are several known solutions to address second problem, also called latching. On the one hand, two or more thyristors are connected one behind the other (see FIG. 2a). On the other hand, multiple forward biased diodes are connected in series in front of the thyristor (see FIG. 2b). However, these approaches result in a higher resistance when the thyristor is operated in the conducting state region, which is disadvantageous for the circuit to be protected, since a higher current then flows through the circuit in the ESD case. These approaches also require more components, so that if they are in the form of semiconductor elements, they require a greater area.
In FIG. 3, a current-voltage characteristic curve for the previously discussed approaches is shown (see FIG. 2). In comparison with the thyristor circuit 1 shown in FIG. 1a, the current-voltage characteristic curve shown in FIG. 1b and for comparison also in FIG. 3, a higher holding voltage 24′ and also a higher switching current 22′ are present, so that the protective effect is affected.
Another approach consists of raising the tripping current, and thus the holding current of the thyristor. If system requirements for the circuit to be protected are that a particular maximum current value cannot be exceeded, and this current value is below the holding current, latching can be avoided. However, this approach has the disadvantage that the thyristor in ESD cases with small or even medium voltage swings does not fire, so that there is insufficient protection for the circuit to be protected. There are also certain circuits to be protected where the system requirements do not limit a maximum current value, for which reason this solution approach cannot be carried out for these circuits.
It is therefore an object of this invention to provide an ESD protection with which the problems and disadvantages described above do not occur and are not present.